Product Detail

USRP X310

$4,800.00

783145-01

Qty:

KINTEX7-410T FPGA, 2 CHANNELS, 10 GIGE AND PCIE BUS

Features:

  • Two wide-bandwidth RF daughterboard slots
    • Up to 120MHz bandwidth each (wideband versions of CBX, WBX, SBX)
    • Daughterboard selection covers DC to 6 GHz
  • Large customizable Xilinx Kintex-7 FPGA for high performance DSP (XC7K410T)
  • Multiple high-speed interfaces
    • Dual 10 Gigabit Ethernet - 200 MS/s Full Duplex
    • PCIe Express (Desktop) - 200 MS/s Full Duplex, 10 us latency
    • ExpressCard (Laptop) - 50 MS/s Full Duplex, 10 us latency
    • Dual 1 Gigabit Ethernet - 25 MS/s Full Duplex
  • UHD architecture provides compatibility with
    • GNURadio
    • C++/Python API
    • Other third-party software and frameworks
  • Flexible clocking architecture
    • Configurable sample rate
    • Optional GPS-disciplined OCXO
    • Coherent operation with external or daisy-chained 10 MHz/1 PPS
  • Compact and rugged half-wide 1U form factor for convenient desktop or rack mount usage
  • Digital I/O accessible on the front panel for custom control and interfacing from the FPGA

Included in This Kit:

  • USRP X310
  • 1 Gigabit Ethernet Cable
  • SFP Adapter for 1 GigE
  • Power Supply and US Cord
  • USB 2.0 Cable for Internal JTAG Adapter
  • Four SMA-Bulkhead Cables
  • Getting Started Guide

Overview

The Ettus Research USRP X310 is a high-performance, scalable software defined radio (SDR) platform for designing and deploying next generation wireless communications systems. The hardware architecture combines two extended-bandwidth daughterboard slots covering DC – 6 GHz with up to 120 MHz of baseband bandwidth, multiple high-speed interface options (PCIe, dual 10 GigE, dual 1 GigE), and a large user-programmable Kintex-7 FPGA in a convenient desktop or rack-mountable half-wide 1U form factor. In addition to providing best-in-class hardware performance, the open source software architecture of X310 provides cross-platform UHD driver support making it compatible with a large number of supported development frameworks, reference architectures, and open source projects.  

Operating Systems

Linux

Windows

Development Frameworks

GNU Radio

Xilinx ISE Design Suite

Table 1: Operating systems, development frameworks, and reference applications

High-Performance User-Programmable FPGA

At the heart of the USRP X310, the XC7K410T FPGA provides high-speed connectivity between all major components within the device including radio frontends, host interfaces, and DDR3 memory.  The default FPGA core provided with UHD provides all of the functional blocks for digital down-conversion and up-conversion, fine-frequency tuning, and scalable system networking [link to section], and other DSP functions allowing it to be interchangeable with other USRP devices using the UHD architecture.  The large Kintex-7 FPGA provides additional space for developers to incorporate custom DSP blocks and is compatible with a large number of USRP supported development frameworks, reference architectures, and open source projects.

 

USRP N210

USRP X300

USRP X310

FPGA

Spartan3 XC3SD3400A

Kintex 7-325T

Kintex 7 -410T

Logic Cells

53k

328k

406k

Memory

2268 Kb

16,020 Kb

28,620 Kb

Multipliers

126

840

1540

Clock Rate

100 MHz

200 MHz

200 MHz

Streaming Bandwidth per Channel (16-bit)

25 MS/s

200 MS/s

200 MS/s

Table 2: FPGA resource comparison

Multiple High-Speed Interface Options

The USRP X310 provides multiple interface options.  Out of the box, 1 GigE provides a convenient way to get started. For extended bandwidth and lower latency applications such as PHY/MAC research, PCIe x4 provides an efficient bus for deterministic operation. Applications using network recorders or multiple processing nodes can be best served by the 10 GigE interface option. 

Additional Features- GPSDO, GPIO, 1 GB DDR3, Synchronization

The X310 includes many additional features that facilitate wireless system development.  On-board 1G DDR3 with flexible access through the FPGA reference design supplements the FPGA resources with buffering and data storage memory.  An optional internal GPSDO provides a high-accuracy frequency reference, and global timing alignment to within 50 ns when synchronized to the GPS system.  The external GPIO connector allows users to control external components such as amplifiers and switches, accept inputs like event triggers, and observe debug signals.  The USRP X310 also includes an internal JTAG adapter that allows FPGA developers to easily load and debug new FPGA images.

Additional Resources

Recommended Daughterboards and Accessories


Product Photos



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USRP X310 Rear View


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USRP X310 Front Panel


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USRP X310 Rear Panel


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Dual USRP X300/X310 in Rackmount (1U)

 

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