Introducing the New Ettus USRP X440 Software Defined Radio


The widest bandwidth, highest channel density USRP SDR

The Ettus USRP X440 software defined radio introduces a very different architecture from the majority of SDRs. X440 utilizes a direct sampling with balun-coupled access to the ADCs and DACs on the onboard Xilinx Zynq UltraScale+ RFSoC. As a result, the device is well suited to use as an intermediate frequency transceiver, connecting to external front ends for applications including satellite communications (SATCOM) prototyping, SATCOM ground station deployment, and mmWave or sub-THz 6G research.

With the change in architecture, the upper frequency of X440 is lower than usually found in USRPs. The USRP X440 can directly sample up to 4 GHz. However, the balun-coupled access to the RFSoC means that it is ideally suited to having an external up and/or downconverter connected, stretching the frequency range well beyond the limits typically accessible with software defined radios. Since the RFSoC can sample at up to 2 GSps per channel, this translates to an instantaneous bandwidth of 1.6 GHz – again a huge leap in bandwidth for USRP devices. Furthermore, with no RF front end circuitry inside the device, the USRP X440 is able to utilize all eight transmit and receive channels of the RFSoC, contributing to the highest channel density achieved on the USRP platform.

Another advantage of no RF circuitry is the relative ease with which channels can be made phase coherent. In many RF applications, phase coherence is achieved by sharing local oscillators (LOs) across channels. However, since the X440 contains no LOs, there are no LOs to be shared. Synchronization is, therefore, sample based and achieved by aligning clocks across channels. This allows the X440 to achieve < 1° RMS phase stability across channels in the same device. Even when expanding to multiple devices, this only rises to < 2° RMS phase stability. Exact values vary by master clock rate, so please refer to the device specifications for more information.

The wide bandwidth afforded by USRP X440 introduces new challenges in data movement to and from the device. With a maximum sampling rate of 2 GSps per channel, that equates to 8 GB/s or 64 Gbit/s bidirectional per stream. When aggregated up to 4 GSps across the device, this totals 128 Gbit/s. To shuttle this volume of data on and off the device requires high-speed links, and since the data volume exceeds the throughput of a single 100 GbE link, two QSFP ports are employed to transfer data over dual 100 GbE. USRP X440 shares the back panel design with the USRP X410, but one should be aware that for the X440, the use of the PCI Express port is not supported in UHD.

The USRP X440 incorporates the same FPGA-based RFSoC as the USRP X410 – namely, the Xilinx Zynq UltraScale+ ZU28DR. This RFSoC provides a significant signal processing boost above other USRP models, and incorporates a quad-core ARM processor that can used for stand-alone, embedded operation. USRP X440 supports RF Network-on-Chip (RFNoC), an open-source processing tool that allows code to be partitioned across FPGA and CPU processing nodes. This accelerates the signal processing development process, and RFNoC contains blocks for common functions like FFTs and FIR filters.  Custom IP blocks can be added via hardware description languages (HDL).


With multiple, phase-coherent channels and wide instantaneous bandwidths, the USRP X440 addresses applications that require direction-finding or beamforming, or the acquisition of wide swathes of the electromagnetic spectrum. And with balun-coupled access to ADCs and DACs on an RFSoC, it is ideally suited to pairing with up and converters for to higher frequency coverage, for applications including radar, SATCOM, and sub-THz 6G prototyping.