Overview

The NI Ettus USRP X410 is a high-performance, multi-channel software-defined radio. The SDR  is designed for frequencies from 1 MHz to 7.2 GHz, tunable up to 8 GHz and features a two-stage superheterodyne architecture with 4 independent TX and RX channels capable of 400 MHz of instantaneous bandwidth each.  Digital interfaces for data offload and control include two QSFP28 interfaces capable of 100 GbE, a PCIe Gen3 x8 [1] interface, as well standard command, control, and debug interfaces: USB-C JTAG, USB-C console, Ethernet 10/100/1000. The USRP X410 is an all-in-one device built on the Xilinx Zynq Ultrascale+ ZU28DR RF System on Chip (RFSoC) with built-in digital up and down conversion and onboard Soft-Decision Forward Error Correction (SD-FEC) IP.

Use the software of your choice 
The NI Ettus USRP X410 is fully supported on the popular open-source USRP Hardware Driver (UHD) version 4.1 or later[2].  UHD 4.1 was designed to support the large data movement requirements imposed by the 400 MHz bandwidth and multiple channels onboard. The USRP X410 supports open-source SDR design flows such as C/C++ and GNU Radio, as well as LabVIEW FPGA [1]. Unlike other RFSoC-based systems, the USRP X410 is fully ready to port your previous UHD designs to take advantage of high-performance capabilities with a simple recompile.

Networked / Stand-Alone Operation
Since the USRP X410 is built on the ZU28DR RF System on Chip (RFSoC) device, it comes equipped with a quad-core ARM Cortex-A53 processing subsystem, clocked up to 1.2 GHz for stand-alone application requirements. Additionally, the RFSoC contains a dual-core ARM Cortex-R5 real-time processing unit for onboard monitoring and control.

Built-In IP
The onboard RFSoC on the USRP X410 contains more than twice the FPGA programmable logic resources than that of the previous generation X-series USRP devices. In addition, the ZU28DR comes with 8 soft-decision forward error correction (SD-FEC) hard IP cores, ideal for wireless communication systems. Given the high-speed nature of the built-in ADCs and DACs to the RFSoC, the Zynq device has 8 digital upconversion and digital down-conversion IP cores allowing for rapid in-band retuning or signal reduction.

Multi-Radio Synchronization 
Multi-radio clocking and timing synchronized operation is possible with the built-in GPSDO (GPS disciplined oscillator) or with the 10 MHz reference and 1 PPS (Pulse Per Second) input signal interfaces. Multi-Radio phase-aligned and phase-coherent operations are not supported, as RF chain LO import and export functionality is not supported on the USRP X410.

[1] PCIe Gen3 x8 is only supported by NI-USRP and LabVIEW FPGA design flows
[2] 100 GBE supported in UHD 4.2 or later

Features

• High channel density
• Reliable and fault-tolerant deployment
• Stand-alone (embedded) or host-based (network streaming) operation
• Fully integrated and assembled (the USRP X410 does not support swappable daughtercards)
• 1 MHz to 7.2 GHz frequency range (tunable up to 8GHz)
• Up to 400 MHz of instantaneous bandwidth per channel
• 4 RX, 4 TX in half-wide RU form factor
• AMD Zynq-Ultrascale+ ZU28DR RFSoC
  • 12 bit ADC, 14 bit DAC
  • IQ Sample Clock rates up to 500 MS/s
  • Onboard SD-FEC, DDC, DUC
  • Quad-core ARM Cortex-A53 up to 1.2 GHz CPU
  • Dual-core ARM Cortex-A5 MPCore up to 500 MHz
• Two QSFP28 ports (10 Gigabit Ethernet, 100 Gigabit Ethernet, Aurora)
• Two iPass+™ zHD® Interfaces (PCIe Gen3 x 8)
• RJ45 (1 GbE) [1]
• 10 MHz Clock reference 
• PPS time reference
• Trig In/Out Interface
• Built-in GPSDO 
• Two FPGA Programmable GPIO Interfaces (HDMI)
• 1 Type C USB host port 
• 1 Type C USB port (serial console, JTAG) 
• Watchdog timer
• OpenEmbedded Linux
• USRP Hardware Driver™ (UHD) open-source software API version 4.1.0 or later
• RF Network on Chip (RFNoC™) FPGA development framework
• AMD Vivado® 2019.1 Design Suite (license not included)
• GNU Radio support is maintained by Ettus Research™ through GR-UHD, an interface to UHD distributed by GNU Radio

[1] The RJ45 port is used for remote management of the device and does not support IQ streaming.

Block Diagram

NI Ettus USRP X400 Motherboard Block Diagram

NI Ettus USRP X410 ZBX Block Diagram

Additional Resources

• USRP X410 Getting Started Guide 
• USRP X410 Product Specification 
• USRP X410 ZBX DaughterBoard Information [1]
• USRP Hardware Driver Users Manual
• Building and Installing UHD and GNU Radio Application Note
• Verifying USRP Operation Application Note
• RFNoC Development Application Note
• Getting Started With UHD and C Application Note
• Safety, Environmental, and Regulatory Information
• Using MathWorks Wireless Testbench with USRP
• 3rd Party Rugged Enclosure Integration From Pixus Technology
• 5G NR Signal Conditioning Module from Signal Craft, Specifically designed for USRP X410

Kit Contents

• USRP X410
• RJ45 Ethernet Cable
• USB-C to USB-A cable
• Power Supply

Recommended Accessories

• Dual 100 Gigabit Ethernet PCIe Interface Kit (PN 788216-01)
• QSFP28 to 4xSFP28 Breakout Cable (PN 788214-01)
• Octoclock CDA-2990
• HDMI cable (PN 152629-01 or 152629-02)
• HDMI Shielded AUX I/O Connector Block (PN 782444-01)
• 3V Active GPS Antenna

[1] The USRP X410 does not support interchangeable daughterboards